The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 01, 2026
Filed:
Nov. 04, 2020
Semiconductor Energy Laboratory Co., Ltd., Atsugi, JP;
Semiconductor Energy Laboratory Co., Ltd., Atsugi, JP;
Abstract
A novel circuit layout method is provided. In a circuit including a first terminal, a second terminal, a third terminal, a fourth terminal, a first wiring, and a second wiring, the layout method includes a step of generating a layout of connecting the first terminal and the third terminal using the first wiring; a step of generating a layout of connecting the second terminal and the fourth terminal using the second wiring; a step of calculating a first wiring resistance of the first wiring; a step of calculating a second wiring resistance of the second wiring; and a step of automatically generating the layouts of the first wiring and the second wiring in the circuit so that the first wiring resistance can be equal to the second wiring resistance.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile