The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 01, 2026

Filed:

May. 28, 2024
Applicant:

At-memory Computing Lp, Wilmington, DE (US);

Inventor:

Maksym Bondarenko, Richmond Hill, CA;

Assignee:

At-memory Computing LP, Wilmington, DE (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/02 (2006.01);
U.S. Cl.
CPC ...
G06F 12/0223 (2013.01);
Abstract

An example device includes a plurality of integrated circuits. Each integrated circuit includes a set of banks. Each bank includes an array of processing elements configured for single instruction, multiple data (SIMD) operations. The device further includes a set of sockets and an external interface. Each socket is configurable to connect to any bank selected from the set of banks. The external interface is connected to the set of sockets. At least two external interfaces of respective integrated circuits are connected for bidirectional communication between the respective integrated circuits. Respective sockets of the respective integrated circuits are connectable to exchange credit for data between two respective banks.


Find Patent Forward Citations

Quick Actions:

Bondarenko, Maksym. (2026). Socket connections among processing-element banks and chips (U.S. Patent No. 12724703). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12724703

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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