The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Sep. 01, 2026

Filed:

Mar. 28, 2024
Applicant:

Advanced Micro Devices, Inc., Santa Clara, CA (US);

Inventors:

Srilatha Manne, Seattle, WA (US);

Rajagopalan Desikan, Austin, TX (US);

Assignee:

ADVANCED MICRO DEVICES, INC., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/32 (2019.01); G06F 1/3228 (2019.01); G06F 1/3287 (2019.01);
U.S. Cl.
CPC ...
G06F 1/3287 (2013.01); G06F 1/3228 (2013.01);
Abstract

A processor includes two or more core dies each including one or more processor cores and/or associated with one or more input/output dies. A hypervisor, firmware in a central processing unit (CPU), or software or firmware located outside of the CPU assigns virtual machines or threads to a first core die and disconnects power from a second core die with no active threads or cores, e.g., by adjusting one or more voltage regulators associated with the second core die, while still providing power to the first core die. In some implementations, active threads or processing cores are migrated from sparsely allocated processing cores or core dies into a reduced number of core dies. Power usage is minimized by disconnecting one or more inactive core dies from power while performance is maximized by increasing the clock frequency of remaining active core dies or remaining active processing cores located therein.


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