The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Sep. 01, 2026
Filed:
Jan. 26, 2023
Applicant:
Samsung Electronics Co., Ltd., Suwon-si, KR;
Inventors:
Assignee:
Samsung Electronics Co., Ltd., Gyeonggi-do, KR;
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G05F 1/46 (2006.01); G06F 1/20 (2006.01); G06F 1/32 (2019.01); G06F 1/3234 (2019.01);
U.S. Cl.
CPC ...
G05F 1/46 (2013.01); G06F 1/203 (2013.01); G06F 1/3253 (2013.01);
Abstract
A power gating method of a system on chip includes transferring a first control signal to a bus by using a power management unit (PMU), transferring a response signal to the PMU by using the bus, in response to the first control signal, moving a transaction to a light bus circuit by using the bus, and transferring a second control signal to a power control circuit by using the PMU to adjust power supplied to the bus, based on the response signal.
Lee, Iksu. (2026). System on chip, bus power gating method thereof, and bus power gating system (U.S. Patent No. 12724438). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12724438
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile