The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 25, 2026

Filed:

Apr. 28, 2023
Applicant:

Boe Technology Group Co., Ltd., Beijing, CN;

Inventors:

Jianchao Zhu, Beijing, CN;

Tuo Sun, Beijing, CN;

Shiming Shi, Beijing, CN;

Libin Liu, Beijing, CN;

Hao Liu, Beijing, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 86/40 (2025.01); G09G 3/3233 (2016.01);
U.S. Cl.
CPC ...
H10D 86/481 (2025.01); G09G 3/3233 (2013.01); H10D 86/441 (2025.01); G09G 2300/0426 (2013.01); G09G 2300/0819 (2013.01); G09G 2300/0852 (2013.01); G09G 2300/0861 (2013.01); G09G 2310/08 (2013.01); G09G 2320/0214 (2013.01); G09G 2320/0247 (2013.01);
Abstract

An array substrate includes a plurality of pixel driving circuits. A respective pixel driving circuit includes a driving transistor, a data write transistor, a first capacitor including a first capacitor electrode and a second capacitor electrode, and a second capacitor including a third capacitor electrode and a fourth capacitor electrode. The second capacitor electrode and the third capacitor electrode are coupled to a second electrode of the data write transistor. The array substrate includes a stacked structure of capacitor electrodes. The stacked structure includes the first capacitor electrode; an insulating layer on the first capacitor electrode; an electrode block including the second capacitor electrode and the third capacitor electrode on a side of the insulating layer away from the first capacitor electrode; an inter-layer dielectric layer on a side of the electrode block away from the insulating layer; and the fourth capacitor electrode on the inter-layer dielectric layer.


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