The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 25, 2026

Filed:

Feb. 06, 2024
Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventor:

Naoki Takizawa, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/739 (2006.01); H10D 12/00 (2025.01); H10D 12/01 (2025.01); H10D 62/10 (2025.01);
U.S. Cl.
CPC ...
H10D 12/481 (2025.01); H10D 12/038 (2025.01); H10D 62/127 (2025.01);
Abstract

Two resistance elements are each formed so as to overlap a portion of each of a gate pad and a gate wiring in a plan view, and are electrically connected to the gate pad and the gate wiring. A p-type well region is formed so as to overlap a portion of each of the two insulating films, the two resistance elements, the gate pad, the gate wiring, and the emitter electrode in the plan view. The emitter electrode includes a convex portion that protrudes toward a gate pad side in a Y direction in the plan view. The convex portion is located between the two resistance elements in the plan view. The convex portion and the well region are electrically connected via a hole formed in an interlayer insulating film.


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Takizawa, Naoki. (2026). Semiconductor device and method of manufacturing the same (U.S. Patent No. 12720783). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12720783

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