The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 25, 2026

Filed:

Aug. 22, 2023
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Jaekyu Sung, Suwon-si, KR;

Joonghyun Baek, Suwon-si, KR;

Cheolwoo Lee, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 80/00 (2026.01); H10W 72/50 (2026.01); H10W 72/90 (2026.01); H10W 74/10 (2026.01); H10W 90/00 (2026.01); H10W 90/24 (2026.01); H10W 72/00 (2026.01);
U.S. Cl.
CPC ...
H10B 80/00 (2023.02); H10W 90/00 (2026.01); H10W 90/24 (2026.01); H10W 72/07552 (2026.01); H10W 72/527 (2026.01); H10W 72/5445 (2026.01); H10W 72/9445 (2026.01); H10W 74/117 (2026.01); H10W 90/752 (2026.01); H10W 90/754 (2026.01);
Abstract

A semiconductor package may include a substrate; at least one controller chip on the substrate; at least one chip structure on the substrate, the at least one chip structure including a buffer chip, an upper chip stack on the buffer chip, and a lower chip stack below the buffer chip; an upper wire electrically connecting the upper chip stack, the buffer chip, and the at least one controller chip; a lower wire electrically connecting the lower chip stack and the at least one controller chip; a connection wire electrically connecting the at least one controller chip to the substrate; and connection bumps below the substrate, the connection bumps being electrically connected to the at least one controller chip and the at least one chip structure.


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Sung, Jaekyu. (2026). Semiconductor package (U.S. Patent No. 12720773). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12720773

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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