The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 25, 2026

Filed:

Jun. 08, 2023
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventor:

Yongjin Park, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10B 80/00 (2026.01); H10W 72/00 (2026.01); H10W 72/20 (2026.01); H10W 72/30 (2026.01); H10W 72/90 (2026.01); H10W 74/01 (2026.01); H10W 74/15 (2026.01); H10W 90/00 (2026.01); H10W 99/00 (2026.01);
U.S. Cl.
CPC ...
H10B 80/00 (2023.02); H10W 74/01 (2026.01); H10W 90/00 (2026.01); H10W 72/07232 (2026.01); H10W 72/07236 (2026.01); H10W 72/07253 (2026.01); H10W 72/07332 (2026.01); H10W 72/234 (2026.01); H10W 72/252 (2026.01); H10W 72/381 (2026.01); H10W 72/931 (2026.01); H10W 72/932 (2026.01); H10W 72/942 (2026.01); H10W 72/944 (2026.01); H10W 72/9445 (2026.01); H10W 72/952 (2026.01); H10W 74/15 (2026.01); H10W 90/722 (2026.01); H10W 90/724 (2026.01); H10W 90/732 (2026.01); H10W 99/00 (2026.01);
Abstract

A semiconductor package includes: a base chip including a substrate, an upper protective layer disposed on the substrate, an upper pad disposed on the upper protective layer, and a groove disposed adjacent to the upper pad and in which the upper protective layer is recessed; a semiconductor chip including a connection pad disposed on the upper pad, the semiconductor chip being mounted on the base chip; a bump disposed on the upper pad, and electrically connecting the base chip and the semiconductor chip; and an adhesive film disposed between the base chip and the semiconductor chip, and fixing the semiconductor chip on the base chip, wherein the adhesive film is configured to fill the groove.


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