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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 12719898 B1

PDFFull Text
Date of Patent:
Aug. 25, 2026

Filed:

Jun. 30, 2022

Signal processing device and vehicle communication device including the same

Applicant:

Lg Electronics Inc., Seoul, KR;

Inventors:

Jooyoung Choi, Seoul, KR;

Younggon Kim, Seoul, KR;

Chaeguk Cho, Seoul, KR;

Changhun Sung, Seoul, KR;

Hansung Kim, Seoul, KR;

Taekyoung Kim, Seoul, KR;

Junsang Park, Seoul, KR;

Youngjae Kim, Seoul, KR;

Jaejin Cho, Seoul, KR;

Assignee:

LG ELECTRONICS INC., Seoul, KR;

Attorney:

Birch, Stewart, Kolasch & Birch, LLP

Primary Examiner:

Van H Nguyen

Int. Cl.
CPC ...
G06F 9/54 (2006.01); B60R 16/023 (2006.01); G06F 9/455 (2018.01); H04L 9/40 (2022.01); H04L 12/66 (2006.01); H04L 41/08 (2022.01); H04L 41/084 (2022.01); H04L 41/5054 (2022.01); H04L 67/12 (2022.01); H04W 4/40 (2018.01); H04W 4/48 (2018.01); H04W 12/40 (2021.01); H04L 12/40 (2006.01);
U.S. Cl.
CPC ...
H04L 63/1425 (2013.01); B60R 16/023 (2013.01); G06F 9/45558 (2013.01); G06F 9/544 (2013.01); G06F 9/546 (2013.01); H04L 12/66 (2013.01); H04L 41/08 (2013.01); H04L 41/084 (2013.01); H04L 41/5054 (2013.01); H04L 67/12 (2013.01); H04W 4/40 (2018.02); H04W 4/48 (2018.02); H04W 12/40 (2021.01); G06F 2009/45595 (2013.01); H04L 2012/40215 (2013.01); H04L 2012/40273 (2013.01);
Abstract

A signal processing device and a vehicle communication device including the same are disclosed. The signal processing device according to an embodiment of the present disclosure includes: a first processor to receive a first message including a sensor signal based on a first communication scheme and to process the received first message; a second processor to receive a second message including a communication message based on a second communication scheme and to process the received second message; and a shared memory to operate to transmit the first message or the second message between the first processor and the second processor, wherein the first processor or the second processor is configured to receive the first message or the second message stored in the shared memory based on an interrupt signal. Accordingly, latency may be reduced and high-speed data transmission may be performed during inter-processor communication.

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