The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 25, 2026
Filed:
Jan. 17, 2024
Applicant:
Cirrus Logic International Semiconductor Ltd., Edinburgh, GB;
Inventors:
John B. Bowlerwell, Dunfermline, GB;
Eric J. King, Austin, TX (US);
Alastair M. Boomer, Edinburgh, GB;
Malcolm Blyth, Edinburgh, GB;
Assignee:
Cirrus Logic Inc., Austin, TX (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H02M 1/00 (2007.01); H02M 1/32 (2007.01); H02M 3/156 (2006.01); H10W 40/00 (2026.01);
U.S. Cl.
CPC ...
H02M 1/327 (2021.05); H02M 1/0009 (2021.05); H02M 3/156 (2013.01); H10W 40/00 (2026.01);
Abstract
A method for controlling an input current limit of boost converter circuitry, the method comprising: receiving a power dissipation value for the boost converter circuitry; and controlling an input current limit of the boost converter circuitry based on the power dissipation value.