Level voltage generation circuit, display driver, and display device

Abstract

The level voltage generation circuit includes: a resistor string that outputs multiple level voltages having different voltage levels respectively from multiple taps; a reference voltage generation part that generates m reference voltages having different voltage values respectively according to a desired gamma characteristic; and first to mgamma buffers that operate by receiving supply of power supply voltages to individually amplify the m reference voltages, and generate and output m gamma voltages to m taps. At least one gamma buffer includes: an offset cancellation amplifier including an offset cancellation circuit that removes an offset occurring in the gamma voltage output by the gamma buffer itself in response to a binary control signal; and a control signal output circuit that generates the control signal with two voltages as the binary, and outputs the control signal to the offset cancellation circuit. The two voltages are selected from the m gamma voltages and the power supply voltages, and have a voltage difference lower than the power supply voltages.