The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 25, 2026

Filed:

Jan. 13, 2021
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Saptarsi Das, Bangalore, IN;

Sabitha Kusuma, Aachen, DE;

Arnab Roy, Bangalore, IN;

Ankur Deshwal, Bangalore, IN;

Kiran Kolar Chandrasekharan, Bangalore, IN;

Sehwan Lee, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06N 20/10 (2019.01); G06F 9/30 (2018.01); G06F 9/38 (2018.01); G06F 15/80 (2006.01); G06F 17/16 (2006.01);
U.S. Cl.
CPC ...
G06N 20/10 (2019.01); G06F 9/30036 (2013.01); G06F 9/3887 (2013.01); G06F 15/8046 (2013.01); G06F 17/16 (2013.01);
Abstract

An apparatus includes a global memory and a systolic array. The global memory is configured to store and provide an input feature map (IFM) vector stream from an IFM tensor and a kernel vector stream from a kernel tensor. The systolic array is configured to receive the IFM vector stream and the kernel vector stream from the global memory. The systolic array is on-chip together with the global memory. The systolic array includes a plurality of processing elements (PEs) each having a plurality of vector units, each of the plurality of vector units being configured to perform a dot-product operation on at least one IFM vector of the IFM vector stream and at least one kernel vector of the kernel vector stream per unit clock cycle to generate a plurality of output feature maps (OFMs).


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