The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 18, 2026

Filed:

Mar. 16, 2023
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Veeresh Pratap Singh, Hyderabad, IN;

Padala V Santhosh, Hyderabad, IN;

Srinivasan Dasasathyan, Hyderabad, IN;

Assignee:

XILINX, INC., SAN JOSE, CA (US);

Primary Examiner:
Int. Cl.
CPC ...
U.S. Cl.
CPC ...
G06F 30/392 ; G06F 2119/12 ; G06F 30/396 ;

Find Patent Forward Citations

Singh, Veeresh. (2026). Pre-placement clocking identification and resolution for circuit designs (U.S. Patent No. 12711298). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12711298

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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