The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 11, 2026

Filed:

Oct. 13, 2023
Applicants:

Kabushiki Kaisha Toshiba, Tokyo, JP;

Toshiba Electronic Devices & Storage Corporation, Tokyo, JP;

Inventors:

Shunta Murai, Kanazawa, JP;

Daiki Yoshikawa, Kanazawa, JP;

Kazutoshi Nakamura, Nonoichi, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 62/10 (2025.01); H10D 12/00 (2025.01); H10D 62/13 (2025.01); H10D 64/00 (2025.01);
U.S. Cl.
CPC ...
H10D 62/127 (2025.01); H10D 12/481 (2025.01); H10D 62/133 (2025.01); H10D 64/112 (2025.01); H10D 64/117 (2025.01);
Abstract

According to one embodiment, a semiconductor device includes first and second electrodes, and first and second regions. The first region includes a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, a plurality of third semiconductor regions of the first conductivity type, a gate electrode, a conductive part, a fourth semiconductor region of the second conductivity type, a fifth semiconductor region of the first conductivity type, and a sixth semiconductor region of the second conductivity type. The gate electrode faces one of the plurality of third semiconductor regions via a gate insulating layer. The conductive part faces another one of the plurality of third semiconductor regions via an insulating layer, and is electrically connected with the second electrode. The fourth and six semiconductor regions are located on the one and the other one of the plurality of third semiconductor regions, respectively.


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