The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 11, 2026

Filed:

Dec. 06, 2021
Applicant:

Panasonic Intellectual Property Management Co., Ltd., Osaka, JP;

Inventor:

Takashi Imanaka, Osaka, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10D 1/68 (2025.01); H10D 1/00 (2025.01);
U.S. Cl.
CPC ...
H10D 1/68 (2025.01); H10D 1/041 (2025.01); H10D 1/692 (2025.01);
Abstract

A method for manufacturing a capacitor includes a groove forming, a masking layer forming, a porous part forming, a dielectric layer forming, and a conductor layer forming. A silicon substrate having a first surface and a second surface and including a capacitance generation region and a non-capacitance generation region is prepared, and a groove recessed from the first surface toward the second surface is formed at a boundary between the capacitance generation region and the non-capacitance generation region. A masking layer including a first masking part and a second masking part is formed on the first surface of the silicon substrate. A porous part having fine pores is formed in the capacitance generation region of the silicon substrate by an anodic oxidation process. A dielectric layer is formed on inner surfaces of the fine pores. A conductor layer including a first conductive part and a second conductive part is formed.


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