The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 11, 2026

Filed:

Aug. 08, 2022
Applicant:

Kioxia Corporation, Tokyo, JP;

Inventors:

Shigehiro Watanabe, Yokkaichi Mie, JP;

Kojiro Shimizu, Mie Mie, JP;

Assignee:

Kioxia Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11582 (2017.01); H10B 41/27 (2023.01); H10B 41/40 (2023.01); H10B 43/27 (2023.01); H10B 43/40 (2023.01);
U.S. Cl.
CPC ...
H10B 43/27 (2023.02); H10B 41/27 (2023.02); H10B 41/40 (2023.02); H10B 43/40 (2023.02);
Abstract

According to one embodiment, a semiconductor memory device includes a stacked body with first conductive layers and first insulating layers alternately stacked. The stacked body includes a staircase portion in which the first conductive layers are in a staircase shape. A columnar portion extends in a stacking direction through the stacked body at the staircase portion. The columnar portion includes a semiconductor layer, a second insulating layer covering a side wall of the semiconductor layer, and a third insulating layer that covers the second insulating layer. The third insulating layer includes a material different from the second insulating layer and includes flanged portions that protrude from a sidewall thereof toward the first conductive layers at corresponding height positions.


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