The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 11, 2026

Filed:

Jul. 29, 2022
Applicant:

Robert Bosch Gmbh, Stuttgart, DE;

Inventors:

Arne Stephen Fischer, Leinfelden-Echterdingen, DE;

Hartmut Wayand, Pfullingen, DE;

Johannes Meckbach, Tuebingen, DE;

Lukas Loeber, Ludwigsburg, DE;

Thomas Kiedrowski, Sersheim, DE;

Assignee:

ROBERT BOSCH GMBH, Stuttgart, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/181 (2026.01); H05K 3/34 (2006.01); H10W 90/00 (2026.01); H10W 72/00 (2026.01);
U.S. Cl.
CPC ...
H05K 1/181 (2013.01); H05K 3/34 (2013.01); H10W 90/401 (2026.01); H05K 2201/10166 (2013.01); H10W 72/07336 (2026.01); H10W 90/734 (2026.01);
Abstract

An electronic assembly having a power semiconductor component and a circuit carrier. The power semiconductor component has a contact region on opposite sides; the contact region facing the circuit carrier is in electrical contact with a connection region of the circuit carrier; the power semiconductor component is in electrical contact on the side facing away from the circuit carrier, in the region of the contact region, with a further circuit carrier; an additively generated connecting layer is arranged on the contact region and/or the connection region of the circuit carriers; and the connecting layer is connected to the connection region and/or the contact region using a solder connection. The connecting layer has a lower modulus of elasticity in a direction or plane extending perpendicularly to the surface of the power semiconductor component than in a direction or plane extending in parallel with the surface of the power semiconductor component.


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