The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 11, 2026

Filed:

Nov. 20, 2023
Applicant:

SK Hynix Inc., Icheon-si, KR;

Inventors:

Hyun Soo Lee, Icheon-si, KR;

Kyu Tae Park, Icheon-si, KR;

Assignee:

SK hynix Inc., Icheon-si, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/08 (2006.01); G11C 16/26 (2006.01); G11C 16/30 (2006.01);
U.S. Cl.
CPC ...
G11C 16/08 (2013.01); G11C 16/26 (2013.01); G11C 16/30 (2013.01);
Abstract

The present technology relates to a semiconductor device. In an embodiment, a memory device capable of reducing a time required for a read operation and preventing an HCI phenomenon of a memory cell may include a plurality of voltage regulators configured to generate operation voltages applied to a word line group, a switch control signal generator configured to generate at least one switch control signal controlling to connect or disconnect at least one voltage regulator among the plurality of voltage regulators to or from the word line group, and a plurality of switching circuits each is connected to any one voltage regulator among the plurality of voltage regulators, and connecting the plurality of voltage regulator to the word line group according to the switch control signal in a period in which a pass voltage among the operation voltages is applied to the word line group during a read operation.


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