The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 11, 2026
Filed:
Mar. 14, 2022
Amazon Technologies, Inc., Seattle, WA (US);
Noah John Shutty, Redwood City, CA (US);
Christopher Chamberland, Pasadena, CA (US);
Amazon Technologies, Inc., Seattle, WA (US);
Abstract
A technique for deriving Clifford circuits using a Satisfiability Modulo Theories (SMT) solver via encoding a Clifford circuit design problem as an SMT decision problem is disclosed. Both symbolic bit matrix representations of elements of the Clifford circuit design problem and constraint equations for modeling the Clifford circuit are used to construct an encoded SMT solver protocol. Clifford circuit solutions are then solved for by the SMT solver before one or more of the solutions are implemented into quantum hardware. Such a technique can be applied to bottom-up fault-tolerant magic state preparation protocol such that an encoded magic state can be teleported from a color code to a surface code via lattice surgery, resulting in a merged surface and color code. Decoding the stabilizer measurements of the merged code requires a decoding algorithm specific to error correction of the merged code.