The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Aug. 11, 2026
Filed:
Dec. 18, 2023
Shanghaitech University, Shanghai, CN;
SHANGHAITECH UNIVERSITY, Shanghai, CN;
Abstract
A window-based dynamic scrubbing scheduling method is provided. By dynamically scheduling a user task and a scrubbing task, the method can reduce scrubbing conflicts of a field-programmable gate array (FPGA) scrubbing module and scrub each user task in a timely manner as much as possible. The method greatly reduces area and energy consumption overheads of a hardware circuit, and improves system reliability. The method proposes a negotiation-driven scrubbing scheduling algorithm and an integer linear programming (ILP)-based optimization-driven scrubbing scheduling algorithm. Based on global conflict information, the algorithms in the method can scrub more user tasks and improve the system reliability. The method ensures reliability of a mixed-criticality task set system. The method provides a dynamic voltage and frequency scaling (DVFS)-based multi-Internet Content Adaptation Protocol (ICAP) port allocation algorithm that can explore an impact of FPGA architecture support on the system reliability to further optimize the system reliability.