The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 04, 2026

Filed:

Aug. 12, 2022
Applicant:

The Hong Kong University of Science and Technology, Hong Kong, CN;

Inventors:

Jing Chen, Hong Kong, CN;

Zheyang Zheng, Hong Kong, CN;

Li Zhang, Hong Kong, CN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H10D 30/47 (2025.01); H10D 30/01 (2025.01); H10D 62/10 (2025.01); H10D 62/17 (2025.01); H10D 62/824 (2025.01); H10D 64/27 (2025.01);
U.S. Cl.
CPC ...
H10D 30/472 (2025.01); H10D 30/015 (2025.01); H10D 62/115 (2025.01); H10D 62/221 (2025.01); H10D 62/824 (2025.01); H10D 64/512 (2025.01);
Abstract

A semiconductor device includes a buffer layer, a barrier layer, a nitride-based semiconductor layer, an isolation layer, and a gate electrode. The barrier layer is disposed on the buffer layer. The nitride-based semiconductor layer is disposed on the barrier layer and has a channel region and a doped region abutting against each other. The isolation layer covers the nitride-based semiconductor layer. The isolation layer and doped channel region can exhibit a type-II energy band alignment (staggered gate stack). The gate electrode is disposed over the isolation layer and the nitride-based semiconductor layer.


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