Secure anti-fuse one time programmable bit cell design

Abstract

Disclosed are secure anti-fuse one-time programmable (OTP) bit cells. In an aspect, an OTP bit cell includes a P− well comprising an N+ region and a P+ region, a first contact electrically coupled to the N+ region of the P− well, a second contact electrically coupled to the P+ region of the P− well, an insulating layer disposed over a portion of the N+ region, a portion of the P− well, and a portion of the P+ region, a gate structure disposed over the insulating layer, and a third contact electrically coupled to the gate structure. In an unprogrammed mode, the insulating layer creates a high resistance between the third contact and the second contact, and in a programmed mode, a rupture in the insulating layer creates a low resistance between the third contact and the second contact.