Offset compensated sense amplifier and memory devices including the same

Abstract

An offset compensated sense amplifier and a memory device including the same are disclosed. A sense amplifier for sensing and amplifying data stored in a memory cell includes a first sense amplifier circuit including first and second PMOS transistors connected to a first sensing driving signal line and a second sense amplifier circuit including first and second NMOS transistors connected to a second sensing driving signal line. The sense amplifier the sense amplifier is configured to perform an offset compensation operation before sensing and amplifying the data stored in the memory cell, the offset compensation operation including a first offset compensation operation based on a threshold voltage difference between the first NMOS transistor and the second NMOS transistor, and a second offset compensation operation based on a threshold voltage difference between the first PMOS transistor and the second PMOS transistor.