The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Aug. 04, 2026

Filed:

Dec. 12, 2024
Applicant:

Lg Display Co., Ltd., Seoul, KR;

Inventors:

Mingyu Park, Paju-si, KR;

Jungjae Kim, Paju-si, KR;

Jaewon Han, Paju-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/3266 (2016.01); G09G 3/36 (2006.01); G09G 3/3233 (2016.01);
U.S. Cl.
CPC ...
G09G 3/3266 (2013.01); G09G 3/3677 (2013.01); G09G 3/3233 (2013.01); G09G 2230/00 (2013.01); G09G 2300/0871 (2013.01); G09G 2310/0267 (2013.01); G09G 2310/0289 (2013.01); G09G 2310/061 (2013.01); G09G 2310/08 (2013.01);
Abstract

Embodiments relate to a level shifter including a first circuit unit configured to output a start signal, a reset signal, and a node charge signal to a gate driver in response to a start control signal and a node charge control signal that are input from a timing controller, a second circuit unit configured to output an output erase signal and a clock shift stop signal in response to the start signal and the reset signal, and a third circuit unit configured to generate a clock signal based on a clock control signal input from the timing controller and output the generated clock signal to the gate driver in response to the output erase signal and the clock shift stop signal that are output from the second circuit unit, a display device including the same, and a method of driving the display device.


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