The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 28, 2026

Filed:

Aug. 30, 2023
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventor:

Jinbum Kim, Suwon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H10D 84/85 (2025.01); H10D 30/01 (2025.01); H10D 30/43 (2025.01); H10D 30/67 (2025.01); H10D 62/10 (2025.01); H10D 64/01 (2025.01); H10D 84/01 (2026.01); H10D 84/03 (2025.01); H10D 88/00 (2026.01);
U.S. Cl.
CPC ...
H10D 84/856 (2025.01); H10D 30/014 (2025.01); H10D 30/43 (2025.01); H10D 30/6729 (2025.01); H10D 30/6735 (2025.01); H10D 62/121 (2025.01); H10D 64/017 (2025.01); H10D 84/0167 (2025.01); H10D 84/017 (2025.01); H10D 84/0186 (2025.01); H10D 84/0188 (2025.01); H10D 84/038 (2025.01); H10D 88/01 (2025.01);
Abstract

A semiconductor device includes a lower structure; a barrier layer on the lower structure; and an upper structure on the barrier layer, wherein the lower structure includes lower source/drain regions; lower active layers spaced apart from each other, between the lower source/drain regions; and a lower gate structure and including portions below each of the lower active layers, wherein the upper structure includes upper source/drain regions and vertically overlapping the lower source/drain regions; upper active layers spaced apart from each other, between the upper source/drain regions, and vertically overlapping the lower active layers; and an upper gate structure, including portions on each of the upper active layers, and vertically overlapping the lower gate structure, and wherein the uppermost lower active layer of the lower active layers and the lowermost upper active layer of the upper active layers are in contact with the barrier layer.


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