The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 28, 2026
Filed:
May. 10, 2023
High speed tx topology with a common mode controlled serialization stage embedded in an output stage
Retym Inc., Cupertino, CA (US);
Roee Eitan, Haifa, IL;
Yaakov Dayan, Jerusalem, IL;
Yosi Sanhedrai, Beit Shemesh, IL;
Aviv Berg, Beit Keshet, IL;
Esther T. Fridman, Jerusalem, IL;
Kirill Blum, Nesher, IL;
Or Adiv, Givatayim, IL;
Avi Miller, Rosh HaAyin, IL;
Retym Inc., Cupertino, CA (US);
Abstract
A high-speed transmitter system using a common mode controlled serialization stage embedded in an output stage is disclosed. In some embodiments, the transmitter includes a serialization circuit that is configured to convert parallel data into serial data with one or more serialization stages; a logic circuit that is configured to connect each input of a last stage of the one or more serialization stages of the serialization circuit, via a respective logic function, to a respective dedicated output stage of an output circuit; and the output circuit that is configured to implement output stages to generate a signal based on the received input using NMOS transistors. In addition, the logic circuit is configured to be a desired voltage value (e.g., the output circuit's common mode) such that a switching point of the NMOS gm stage can be decreased and the gm stage can be activated within a reduced time.