The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 28, 2026

Filed:

Dec. 19, 2023
Applicant:

Sumitomo Electric Industries, Ltd., Osaka, JP;

Inventors:

Yoshiyuki Sugimoto, Osaka, JP;

Keiji Tanaka, Osaka, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/45 (2006.01); H03F 3/26 (2006.01); H04B 10/69 (2013.01);
U.S. Cl.
CPC ...
H04B 10/6911 (2013.01); H03F 3/265 (2013.01); H03F 3/45636 (2013.01);
Abstract

A receiver circuit includes: a constant current circuit to generate second paired current signals according to first paired current signals; a current splitter circuit to output third differential signals having amplitudes smaller than the second paired current signals, from a first and second output nodes; first and second load resistor elements connected between a DC voltage node and the first and second output nodes, respectively; a differential transimpedance amplifier circuit to output paired voltage signals according to the third paired current signals, from first and second output terminals; and a voltage regulator circuit to adjust a gate voltage of an FET connected between a power supply wire and the DC voltage node, so as to reduce at least a difference in respective average potentials of the first and second output nodes and the first and second output terminals.


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