Low-power output driver for power-supply termination in memory interface applications

Abstract

An output driver is disclosed that can include a delay generator configured to produce a plurality of delay signals in response to an input signal; a pre-driver configured to produce a plurality of control signals based on the plurality of shifted delay signals; and a main driver configured to couple to a channel with an asymmetric termination and provide an output signal at a node of the main driver based in response to the plurality of control signals, wherein the plurality of control signals provides for an asymmetric response in the main driver in response to the asymmetric termination. In some embodiments, an asymmetric switching sequence can be included. In some embodiments, a pull-up diode can be engaged. In some embodiments, the output driver is arranged to operate with core voltages and core transistors.