The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 28, 2026
Filed:
Feb. 24, 2022
Xilinx, Inc., San Jose, CA (US);
Abhishek Kumar Jain, San Jose, CA (US);
Dinesh Gaitonde, Fremont, CA (US);
XILINX, INC., San Jose, CA (US);
Abstract
Circuitry for multiplying a sparse matrix by a dense vector includes a first switching circuit () for routing input triplets from N input ports to N output ports based on column indices of the triplets. Each triplet includes a non-zero value, a row index, and a column index. N first memory banks () store subsets of vector elements and are addressed by the column indices of the triplets. N multipliers () multiply the non-zero values of the triplets by the vector element read from the respective memory bank. A second switching circuit () routes tuples based on row indices of the tuples. Each tuple includes a product output by the one of the N multipliers and a row index output by an output port of the first switching circuit. N accumulator circuits () sum products of tuples having equal row indices.
Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile