The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 21, 2026

Filed:

Sep. 03, 2024
Applicant:

Electronics and Telecommunications Research Institute, Daejeon, KR;

Inventors:

Kwang Ok Kim, Daejeon, KR;

Kyeong Hwan Doo, Daejeon, KR;

Hwan Seok Chung, Daejeon, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 13/11 (2006.01);
U.S. Cl.
CPC ...
H03M 13/114 (2013.01);
Abstract

A hardware optimization device for a low-density parity check (LDPC) decoder according to one embodiment of the present invention includes a variable node unit configured to update a variable node message delivered to each variable node, and a check node unit configured to update a check node message delivered to each check node, wherein the variable node unit and the check node unit divide a parity check matrix into N column blocks for the update (N is a natural number of 2 or more), repeatedly perform calculations for the variable node and the check node for each of the divided column blocks, and perform different calculations for variable nodes according to each of phases through a pipeline method.


Find Patent Forward Citations

Kim, Kwang. (2026). Hardware optimization device and method for low-density parity check decoder (U.S. Patent No. 12689390). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12689390

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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