The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 21, 2026

Filed:

Jan. 17, 2025
Applicant:

Superc-touch Corporation, New Taipei City, TW;

Inventors:

Hsiang-Yu Lee, New Taipei City, TW;

Shang Chin, New Taipei City, TW;

Ping-Tsun Lin, New Taipei City, TW;

Chia-Cheng Lei, New Taipei City, TW;

Kun-Yu Chen, New Taipei City, TW;

Assignee:

SUPERC-TOUCH CORPORATION, New Taipei City, TW;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/34 (2006.01); G02F 1/167 (2019.01); G02F 1/16766 (2019.01); G02F 1/1685 (2019.01);
U.S. Cl.
CPC ...
G09G 3/344 (2013.01); G02F 1/167 (2013.01); G02F 1/16766 (2019.01); G02F 1/1685 (2019.01); G09G 2310/0267 (2013.01); G09G 2310/0291 (2013.01); G09G 2310/08 (2013.01);
Abstract

An electrophoresis display includes a pixel control array including pixel units, a gate control circuit electrically connected to the pixel control array. The gate control circuit includes a plurality of gate driving circuit sets, one of the gate driving circuit sets includes a plurality of gate driving circuits. One of the gate driving circuits includes gate thin film transistor where an output of one gate driving circuit is electrically connected to a gate line of the pixel control array, a plurality of control signal lines where one of the control signal lines is connected to an input of one of the gate driving circuits of one gate driving circuit set, a plurality of gate driving circuit set enable lines where one of the gate driving circuit set enable lines is connected to the enable control points of the gate driving circuits of each gate driving circuit set.


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