The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 21, 2026
Filed:
Feb. 27, 2026
Tensordyne, Inc., San Jose, CA (US);
Jian Hui Huang, Los Altos, CA (US);
Gary S. Goldman, Los Altos, CA (US);
Jan Lennart Haug, Munich, DE;
Michael Wilhelm Laraia, Munich, DE;
Lukas Rinder, Munich, DE;
Tensordyne, Inc., Sunnyvale, CA (US);
Abstract
A matrix multiplication system and method are disclosed that perform multiplication in a logarithmic domain and accumulation in a linear domain using co-designed bidirectional conversion circuits. Linear-domain operands are converted to a logarithmic domain by a linear-to-logarithmic conversion that divides a mantissa into exactly four non-uniform windows and applies affine mappings implemented using shift and add operations. Logarithmic-domain multiplication results are converted to linear-domain values by a logarithmic-to-linear conversion that divides a mantissa into exactly four equal-width windows and applies corresponding affine mappings implemented using shift and add operations. The affine mappings of the linear-to-logarithmic conversion are analytic inverses of the affine mappings of the logarithmic-to-linear conversion, and window boundaries of the linear-to-logarithmic conversion are derived by inverse mapping of the logarithmic-to-linear window boundaries. The conversion circuits are co-designed to provide round-trip exactness apart from quantization effects, thereby avoiding systematic bias during accumulation.