Metal wires with expanded sidewalls

Abstract

A semiconductor structure including a homogeneous interconnect structure embedded in a dielectric layer, where the homogeneous interconnect structure includes a third region vertically aligned above a second region vertically aligned above a first region, the third region includes three sections: an upper section including a first width; a middle section including an upper horizontal surface including the first width and a lower horizontal surface including a second width; and a lower section including the second width; where the first width is less than the second width; and the second region including a third width at an upper horizontal surface of the second region and a fourth width at a lower horizontal surface of the second region, where the third width is greater than the fourth width.