The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 14, 2026

Filed:

Mar. 13, 2024
Applicant:

Boe Technology Group Co., Ltd., Beijing, CN;

Inventors:

Dongni Liu, Beijing, CN;

Qi Qi, Beijing, CN;

Feng Qu, Beijing, CN;

Minghua Xuan, Beijing, CN;

Haoliang Zheng, Beijing, CN;

Jiao Zhao, Beijing, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G09G 3/3233 (2016.01); H10K 59/131 (2023.01);
U.S. Cl.
CPC ...
H10K 59/131 (2023.02); G09G 3/3233 (2013.01); G09G 2320/0223 (2013.01); G09G 2320/0233 (2013.01); G09G 2330/02 (2013.01);
Abstract

An array substrate has a display area and a non-display area including a first bonding region and a fan-out region located between the display area and the first bonding region. The array substrate includes: a plurality of pixel columns disposed in the display area, at least two first power supply input terminals disposed in the first bonding region, and at least two first fan-out structures disposed in the fan-out region. Each pixel column includes light-emitting units. Each first power supply input terminal is connected to multiple pixel columns of the plurality of pixel columns through one first fan-out structure, so as to provide a first power supply signal to the multiple pixel columns. Each first fan-out structure includes a plurality of first conductive units, and each first conductive unit is electrically connected to at least one of the plurality of pixel columns.


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