The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 14, 2026

Filed:

Mar. 11, 2024
Applicant:

Realtek Semiconductor Corporation, Hsinchu, TW;

Inventors:

Chien-Hsun Lu, Hsinchu, TW;

Chu-King Kung, Hsinchu, TW;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03D 3/18 (2006.01); G06F 3/16 (2006.01); H03D 3/24 (2006.01); H04L 7/00 (2006.01); H04L 7/033 (2006.01);
U.S. Cl.
CPC ...
H04L 7/0079 (2013.01); G06F 3/162 (2013.01); H04L 7/033 (2013.01);
Abstract

A falling-edge modulation signal receiver is configured to process an input signal having a duty cycle varying with a bit value of the input signal. The receiver includes: a phase-locked loop for generating an oversampling clock according to the input signal which correlates with a signal clock, wherein the oversampling frequency is not lower than five times the frequency of the signal clock; an oversampling circuit for sampling the input signal according to the oversampling clock and thereby generating multiple groups of data which as a whole is corresponding to a single bit of the input signal; and a decision circuit for ascertaining that X bits of the multiple groups of data are 1 and determining the value of the single bit according to the X. When the X is greater/less than a threshold, the decision circuit determines that the value of the single bit is 1/0.


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