The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 14, 2026

Filed:

Sep. 20, 2023
Applicant:

Zjw Microelectronics North America Inc., Wilmington, MA (US);

Inventors:

Xiaoqiang Shou, Westford, MA (US);

Ziqing Lu, Shanghai, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/45 (2006.01);
U.S. Cl.
CPC ...
H03F 3/45995 (2013.01); H03F 3/45112 (2013.01); H03F 3/4521 (2013.01); H03F 3/45623 (2013.01); H03F 3/45771 (2013.01); H03F 2203/45026 (2013.01); H03F 2203/45032 (2013.01); H03F 2203/45038 (2013.01); H03F 2203/45136 (2013.01);
Abstract

An input stage circuit for an operational amplifier includes first and second differential pairs connected in parallel between positive and negative input terminals. Each differential pair comprises a pair of transistors that are intentionally and systematically mismatched. The mismatching of each transistor pair creates a pre-trim input offset voltage for the circuit. However, a unique current is utilized to bias each of the first and second differential pairs. By adjusting the differential between the bias currents, a composite input offset voltage is created that combines with the pre-trim input offset voltage to yield a total input offset voltage for the circuit that approaches zero. Additionally, adjusting the differential between the bias currents simultaneously trims the temperature coefficient of the total input offset voltage to zero while using limited power and producing minimal noise.


Find Patent Forward Citations

Shou, Xiaoqiang. (2026). Input stage circuit for an operational amplifier with enhanced input offset voltage trimming capabilities (U.S. Patent No. 12683567). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12683567

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

Loading…