The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 14, 2026

Filed:

Apr. 20, 2023
Applicant:

Stmicroelectronics S.r.l., Agrate Brianza, IT;

Inventor:

Gaetano Cosentino, Catania, IT;

Assignee:

STMicroelectronics S.r.l., Agrate Brianza, IT;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/45 (2006.01); H03F 1/08 (2006.01); H03F 1/48 (2006.01);
U.S. Cl.
CPC ...
H03F 3/45475 (2013.01); H03F 1/086 (2013.01); H03F 1/483 (2013.01); H03F 3/45273 (2013.01); H03F 3/45174 (2013.01); H03F 3/45179 (2013.01);
Abstract

A circuit an amplifier stage that amplifier stage includes a positive amplifier branch and a negative amplifier branch and has current flow paths therethrough cascaded in a flow line for a core current for the amplifier stage between a supply node and a ground node. The positive and negative amplifier branches have respective input nodes configured to receive an input signal applied therebetween. A current mirror loop can be coupled to the respective input nodes of the positive and negative amplifier branches and provides an adjustable high-impedance bias source for the core current for the amplifier stage. In addition to, or instead of the current mirror loop, the circuit can include stability network having a gain bandwidth range. The amplifier stage is configured to short-circuit the output signal from the amplifier stage within the gain bandwidth range based on an output voltage setting signal.


Find Patent Forward Citations

Cosentino, Gaetano. (2026). Circuit having an amplifier stage and a current mirror loop or stability network (U.S. Patent No. 12683566). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12683566

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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