Multi-level structures and methods for switched-mode power supplies

Abstract

Methods for modifying converter cells for switched-mode power converters, and corresponding power converter cells. The modified converter cells exhibit reduced inductance requirements, enable use of lower voltage and smaller switches, provide improved power density and efficiency, and provide for improved input/output voltage dynamic range. Embodiments of the methods generate converter cell topologies having 3 or more node voltage levels by successively applying a 'split switches and connect through a capacitor' operation. The inventive processes, or variants of those processes, may be applied to converter cell topologies that are 2-level converter cells including at least one inductance and two switches, and particularly 2-level converter cells including either (1) an order of at least 3 (i.e., 3 or more energy storage elements in some combination of inductances and capacitances, but with at least one inductance) and at least 2 switches, or (2) at least 1 designed-in inductance and at least 4 switches.