The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 14, 2026

Filed:

Jan. 31, 2024
Applicant:

Qualcomm Incorporated, San Diego, CA (US);

Inventors:

Debarghya Dutta, Kolkata, IN;

Ramakoti Nimmakayala, Bangalore, IN;

Rahul Sahu, Bangalore, IN;

Diwakar Singh, Bangalore, IN;

Assignee:

QUALCOMM Incorproated, San Diego, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 11/419 (2006.01);
U.S. Cl.
CPC ...
G11C 11/419 (2013.01);
Abstract

A memory is provided that includes a negative bit line hybrid boost circuit for boosting a discharged bit line to a negative voltage during a negative bit line boost period for a write operation to a selected column in the memory. The hybrid boost circuit uses a charged gate capacitance of a boost transistor and a charged capacitance of a metal line capacitor to provide the negative bit line boost. Similarly, the memory may include a word line hybrid boost circuit that uses another boost transistor and another metal line capacitor for boosting a word line above a word line power supply voltage during the write operation.


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