The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 14, 2026
Filed:
May. 15, 2024
Accenture Global Solutions Limited, Dublin, IE;
Rajendra Prasad Tanniru, Basking Ridge, NJ (US);
Vijeth Srinivas Hegde, Bangalore, IN;
Ravindra Kabbinale, Bangalore, IN;
Santhosh Mv, Kasaragod, IN;
Sreenath Kothavoor, Kannur, IN;
Amrutha Pervody Bhat, Bangalore, IN;
Naveen Raj K P, Kasaragod, IN;
Lakshmi Srinivasan, Bangalore, IN;
Koushik M Vijayaraghavan, Chennai, IN;
Harshitha Shetty, Bantwal taluk, IN;
Rajath Jain, Mysore, IN;
Ashutosh Kumar, Bangalore, IN;
ACCENTURE GLOBAL SOLUTIONS LIMITED, Dublin, IE;
Abstract
Systems and methods for generating system architecture representation by implementing machine learning (ML) techniques are disclosed. The system receives a request for generating system architecture representation from at least one user and generates an architecture summary for the received request. Further, the system determines an architecture pattern relevant to the received request based on a context of the generated architecture summary using the large language models and machine learning (ML) models. The system further generates an architecture code corresponding to the received request. The system validates the generated architecture code for determining errors in the generated architecture code based on compliance-based rules, legal-based rules, and security-based rules specific to an organization using the machine learning (ML) models. The system further generates the at least one system architecture representation based on successful validation and outputs the generated architecture code and the at least one system architecture representation on a user interface.