The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 14, 2026

Filed:

Jul. 30, 2024
Applicant:

Sambanova Systems, Inc., Palo Alto, CA (US);

Inventor:

Manish K Shah, Austin, TX (US);

Assignee:

SambaNova Systems, Inc., Palo Alto, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 15/80 (2006.01); G06F 1/24 (2006.01); G06F 9/4401 (2018.01); G06F 9/48 (2006.01); G06F 11/14 (2006.01); G06F 15/16 (2006.01); G06F 15/78 (2006.01); G06F 15/82 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1441 (2013.01); G06F 1/24 (2013.01); G06F 9/442 (2013.01); G06F 9/485 (2013.01); G06F 15/16 (2013.01); G06F 15/80 (2013.01); G06F 15/7867 (2013.01); G06F 15/825 (2013.01);
Abstract

Disclosed is a method for resetting configurable units in a reconfigurable processor with an array of configurable units and a force-quit controller on an integrated circuit substrate. The array includes multiple sub-arrays of configurable units. The method involves receiving a force-quit command at the force-quit controller and generating force-quit control signals to reset configurable units in a specific sub-array of the plurality of sub-arrays. The specific sub-array contains the force-quit controller. This method enhances the efficiency and reliability of reconfigurable processors by enabling targeted and controlled resets of configurable units within the reconfigurable processor architecture.


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