The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 14, 2026
Filed:
Apr. 30, 2024
Arm Limited, Cambridge, GB;
Rajiv Kumar Sisodia, Bangalore, IN;
Andy Wangkun Chen, Austin, TX (US);
Yew Keong Chong, Austin, TX (US);
Prashantkumar Jayantilal Vaghasia, Austin, TX (US);
Vishal Thakre, Austin, TX (US);
Jaspreet Singh, Bangalore, IN;
Sreelekha Nallagatla, Bangalore, IN;
Arm Limited, Cambridge, GB;
Abstract
A memory device includes a bitcell array having at least a first plurality of first adjacent bitcell banks and a second plurality of second adjacent bitcell banks. One or more bitcell array input lines are coupled to the bitcell array at a first physical location between the first adjacent bitcell banks. One or more bitcell array output lines are coupled to the bitcell array at a second physical location between the second adjacent bitcell banks. The one or more bitcell array input lines are further coupled from the first plurality of adjacent bitcell banks to the second plurality of bitcell banks at a physical location between the second plurality of adjacent bitcell banks. The one or more bitcell array output lines are further coupled from the second plurality of bitcell banks to the first plurality of bitcell banks at a physical location between the first plurality of bitcell banks.