The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jul. 07, 2026
Filed:
Mar. 24, 2023
Applicant:
Murata Manufacturing Co., Ltd., Kyoto, JP;
Inventors:
Yoshihito Otsubo, Nagaokakyo, JP;
Morio Takeuchi, Nagaokakyo, JP;
Tsuyoshi Takakura, Nagaokakyo, JP;
Assignee:
Murata Manufacturing Co., Ltd., Kyoto-fu, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10W 44/20 (2026.01); H10W 42/20 (2026.01); H10W 70/60 (2026.01); H10W 70/65 (2026.01); H10W 72/00 (2026.01); H10W 90/00 (2026.01);
U.S. Cl.
CPC ...
H10W 44/20 (2026.01); H10W 42/20 (2026.01); H10W 70/611 (2026.01); H10W 70/65 (2026.01); H10W 72/071 (2026.01); H10W 72/07554 (2026.01); H10W 90/754 (2026.01);
Abstract
To provide a circuit module capable of suppressing a decrease in an area for mounting an electronic component on a substrate even when a wire for shielding the electronic component is connected to the substrate. A circuit module according to the present disclosure includes a substrate, a first component mounted on the substrate and including a ground terminal on an upper surface, first wires that connect the ground terminal to the substrate, and a second component mounted on the substrate, in which overlapping first wires in plan view.