Solid-state imaging element, imaging device, and method for controlling solid-state imaging element with a sample-and-hold circuit including a plurality of capacitor elements

Abstract

A circuit scale is reduced in a solid-state imaging element that combines a plurality of frames. A pre-stage circuit generates an analog signal as a pixel signal. A sample-and-hold circuit holds a high gain signal obtained by amplifying the pixel signal with a gain corresponding to a capacitance of any of a plurality of capacitor elements, and generates a low gain signal obtained by amplifying the pixel signal with a gain corresponding to a ratio of a combined capacitance of the plurality of capacitor elements to the capacitance. A post-stage circuit sequentially reads and outputs the high gain signal and the low gain signal from the sample-and-hold circuit.