The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 07, 2026

Filed:

Jun. 20, 2024
Applicant:

Kioxia Corporation, Tokyo, JP;

Inventors:

Yuki Inuzuka, Yokohama Kanagawa, JP;

Akiyuki Murayama, Koto Tokyo, JP;

Assignee:

Kioxia Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G11C 16/26 (2006.01); G11C 8/08 (2006.01); G11C 8/14 (2006.01); G11C 11/06 (2006.01); G11C 16/04 (2006.01); G11C 16/08 (2006.01); G11C 16/30 (2006.01); H10B 43/10 (2023.01); H10B 43/27 (2023.01);
U.S. Cl.
CPC ...
G11C 16/26 (2013.01); G11C 8/08 (2013.01); G11C 8/14 (2013.01); G11C 11/06071 (2013.01); G11C 16/0483 (2013.01); G11C 16/08 (2013.01); G11C 16/30 (2013.01); H10B 43/10 (2023.02); H10B 43/27 (2023.02); G11C 2213/82 (2013.01); G11C 2216/02 (2013.01);
Abstract

A semiconductor memory device includes a memory pillar; first and second conductive layers on either side of the memory pillar; third and fourth conductive layers and fifth and sixth conductive layer respectively below and above first and second conductive layers; seventh and eighth conductive layers below third and fourth conductive layers; ninth and tenth conductive layers above fifth and sixth conductive layers; memory cells formed between a respective first through tenth conductive layers and the memory pillar; and a control circuit, which applies a read voltage to the first conductive layer, a negative voltage to second, fourth, and sixth conductive layers, and a read pass voltage to other conductive layers, applies the read pass voltage to first, second, fourth, and sixth conductive layers, applies a ground voltage or lower to a first group of conductive layers, and then a ground voltage to a second group of conductive layers.


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