The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jul. 07, 2026

Filed:

Dec. 10, 2024
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventor:

Stephan Leisenheimer, Oberhaching, DE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 13/362 (2006.01);
U.S. Cl.
CPC ...
G06F 13/362 (2013.01);
Abstract

The present disclosure relates to an electronic system including a master IC, a slave IC and a serial communication interface having a bidirectional data line and a clock line. The master IC is configured to send a data request command to the slave IC via the data line. The slave IC is configured to begin providing requested data in response to the data request command. The slave IC is configured to deactivate the clock line after receiving a data read command and until the slave IC can provide the requested data. The master IC is configured to measure a duration of the deactivation of the clock line and to set a wait time between a next data request command and a next data read command according to the measured duration.


Find Patent Forward Citations

Leisenheimer, Stephan. (2026). Electronic system having an integrated master circuit and an integrated slave circuit (U.S. Patent No. 12675425). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/12675425

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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