The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jun. 30, 2026
Filed:
Jan. 18, 2023
Applicant:
Massachusetts Institute of Technology, Cambridge, MA (US);
Inventors:
Kevin Ryu, Arlington, MA (US);
Joseph S. Ciampi, Westford, MA (US);
Brian F. Aull, Cambridge, MA (US);
Kevan Donlon, Arlington, MA (US);
Renee D. Lambert, Framingham, MA (US);
Assignee:
Massachusetts Institute of Technology, Cambridge, MA (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H10F 71/00 (2025.01); H10F 30/225 (2025.01); H10F 39/00 (2025.01); H10F 39/10 (2025.01); H10F 39/18 (2025.01); H10F 77/00 (2025.01); H10F 77/122 (2025.01);
U.S. Cl.
CPC ...
H10F 71/137 (2025.01); H10F 30/2255 (2025.01); H10F 39/016 (2025.01); H10F 39/018 (2025.01); H10F 39/026 (2025.01); H10F 39/028 (2025.01); H10F 39/103 (2025.01); H10F 39/107 (2025.01); H10F 39/18 (2025.01); H10F 39/809 (2025.01); H10F 39/811 (2025.01); H10F 71/128 (2025.01); H10F 71/129 (2025.01); H10F 77/122 (2025.01); H10F 77/933 (2025.01); H10F 77/959 (2025.01);
Abstract
Fabrication of avalanche photodiodes on a first wafer for operation in Geiger mode and integration with read-out integrated circuits (ROICs), fabricated on a second wafer, are described. Photodiode arrays are fabricated using a thin epitaxial layer grown on a semiconductor-on-insulator wafer. Chips are diced from the first wafer and bump bonded to chips diced from the second wafer.