The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 30, 2026

Filed:

Feb. 27, 2023
Applicants:

Fuzhou Boe Optoelectronics Technology Co., Ltd., Fuzhou, CN;

Boe Technology Group Co., Ltd., Beijing, CN;

Inventors:

Chunyu Li, Beijing, CN;

Lifeng Lin, Beijing, CN;

Bo Hu, Beijing, CN;

Xin Lin, Beijing, CN;

Xin Fang, Beijing, CN;

Wenchao Wang, Beijing, CN;

Rong Zhou, Beijing, CN;

Jianshu Wang, Beijing, CN;

Pei Hu, Beijing, CN;

Yichiang Lai, Beijing, CN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H10D 86/60 (2025.01); G02F 1/1345 (2006.01); G02F 1/1362 (2006.01); G06F 3/041 (2006.01); H10D 86/40 (2025.01); H10K 59/131 (2023.01); H10K 59/88 (2023.01); H10W 42/60 (2026.01);
U.S. Cl.
CPC ...
H10D 86/60 (2025.01); G02F 1/13452 (2013.01); G02F 1/136286 (2013.01); H10D 86/441 (2025.01); H10D 86/443 (2025.01); H10K 59/131 (2023.02); H10K 59/88 (2023.02); H10W 42/60 (2026.01); G06F 3/0412 (2013.01);
Abstract

An array substrate, a display panel and a manufacturing method thereof are provided. The array substrate includes data lines, gate lines, a gate driving structure electrically connected with the gate lines and the gate driving signal lines, gate driving signal lines and a data fanout wiring region. The array substrate further includes a dummy fanout wiring region, a dummy pad region and a bended line, the data fanout wiring region and the dummy fanout wiring region are located at both sides of the display region, the data lines are electrically connected with pads in the dummy pad region through the wires in the dummy fanout wiring region; the gate driving signal lines are electrically connected with pads in the dummy pad region; a transmission line is disposed at one side of the gate driving structure away from the display region and electrically connected with the bended line.


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