The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jun. 30, 2026

Filed:

Oct. 31, 2023
Applicant:

Texas Instruments Incorporated, Dallas, TX (US);

Inventors:

Jerald Rock, Lisbon, ME (US);

Thomas Moutinho, Gorham, ME (US);

Tatsuya Tominari, Plano, TX (US);

Thanas Budri, Portland, ME (US);

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/66 (2006.01); H01L 21/02 (2006.01); H01L 21/3065 (2006.01); H01L 29/08 (2006.01); H01L 29/10 (2006.01); H01L 29/737 (2006.01); H10D 10/01 (2025.01); H10D 10/80 (2025.01); H10D 62/13 (2025.01); H10D 62/17 (2025.01); H10P 14/20 (2026.01); H10P 50/24 (2026.01);
U.S. Cl.
CPC ...
H10D 10/021 (2025.01); H10D 10/821 (2025.01); H10D 62/136 (2025.01); H10D 62/137 (2025.01); H10D 62/177 (2025.01); H10P 14/27 (2026.01); H10P 14/3411 (2026.01); H10P 50/242 (2026.01);
Abstract

A semiconductor device includes a heterojunction bipolar transistor (HBT) having a collector, a base, and an emitter. The base includes a monocrystalline base layer, including silicon-germanium, on the collector, and an extrinsic base layer, including polycrystalline silicon, extending partway over the monocrystalline base layer. The base further includes a base link, including polycrystalline silicon-germanium, connecting the monocrystalline base layer to the extrinsic base layer. An emitter spacer, of dielectric material, laterally separates the emitter from the extrinsic base layer. The HBT has a spacer-extrinsic base vertical offset between a bottom of the emitter spacer and a bottom surface of the extrinsic base layer adjacent to the emitter spacer. The emitter spacer has a bottom width at a bottom of the emitter spacer. A sum of the spacer-extrinsic base vertical offset and the bottom width of the emitter spacer is greater than the thickness of the monocrystalline base layer.


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