Three-dimensional memory device containing scaleless staircase structures and methods of forming the same

Abstract

A method of forming a staircase structure in a semiconductor device includes forming primary terrace patterns in an alternating stack, repeating a respective anisotropic etch process that etches unmasked portions of the alternating stack and a respective mask trimming process to form additional terrace patterns, determining if the respective mask trimming process trimmed the mask within a desired distance range using the primary terrace patterns in the staircase structure as alignment marks, and forming layer contact via structures which contact electrically conductive layers in the primary terrace patterns and the additional terrace patterns.